VLSI Co-processor for AI based Spectrum Sensing

Spectrum sensing is a critical function in cognitive radio and next-generation wireless
systems, where reliable detection of available frequency bands must be achieved under strict power
and latency constraints. This paper presents an AI-assisted low-power spectrum sensing architecture
implemented as a hardware co-processor on FPGA, combining conventional energy detection with a
selective TinyML-based classifier. The proposed design performs primary user detection using energy
detection (ED) with early stopping, while a lightweight multi-layer perceptron (MLP) neural network
is invoked only in uncertain decision regions, significantly reducing computational overhead.
The TinyML model is trained offline in MATLAB and deployed for inference using fixed
point arithmetic, making the architecture suitable for resource-constrained hardware. A 3-element
feature vector comprising signal energy, variance, and zero-crossing rate (ZCR) is used as classifier
input. The RTL design is synthesized and verified in Xilinx Vivado with post-mapping and post
fitting technology maps confirming successful device implementation. Functional simulation in
ModelSim validates correct detection pipeline behaviour.
Experimental evaluation demonstrates a detection accuracy of 94.88% with an average AI
invocation rate of only 6.72%, and the FPGA-based implementation achieves sub-microjoule energy
consumption of 0.1152 µJ per detection (ED-only) and 0.2048 µJ in the worst-case AI-assisted
scenario, resulting in nearly 95× lower sensing energy compared to conventional collaborative
spectrum sensing. Operating at 50 MHz, the system achieves microsecond-level detection latency.